Fig. 1.
(Color online) (a) The circuit schematic diagram of the MEMS microphone. (b) The ESD application circuit of MEMS microphone.
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2026
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Wei Liu, Yujie Liu, Zhixiang Cao, Yuxuan Yang, Haoxiang Li, Xiangliang Jin. A parallel dual-BJT enhanced SCR featuring high holding voltage and high-temperature stability for ESD protection of MEMS microphone readout ICs[J]. Journal of Semiconductors, 2026, In Press. doi: 10.1088/1674-4926/26010029
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W Liu, Y J Liu, Z X Cao, Y X Yang, H X Li, and X L Jin, A parallel dual-BJT enhanced SCR featuring high holding voltage and high-temperature stability for ESD protection of MEMS microphone readout ICs[J]. J. Semicond., 2026, 47(11): 112301 doi: 10.1088/1674-4926/26010029
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A parallel dual-BJT enhanced SCR featuring high holding voltage and high-temperature stability for ESD protection of MEMS microphone readout ICs
DOI: 10.1088/1674-4926/26010029
CSTR: 32376.14.1674-4926.26010029
More Information-
Wei Liu received the B.E. degree in Changsha University of Science & Technology. He is currently pursuing the M.S. degree at the School of Physics and Electronic Science, Hunan Normal University. His research interest focuses on on-chip electrostatic discharge protection design -
Xiangliang Jin received the M.S. degree from Hunan University in 2000 and the Ph.D. degree in microelectronics and solid-state circuits from the Institute of Microelectronics, Chinese Academy of Sciences, in 2004. He is currently a Full Professor and Xiaoxiang Scholar at Hunan Normal University and Director of the Key Laboratory of Physics and Devices in the Post-Moore Era of Hunan Province. His research interests include micro/nanoelectronic devices and integration, optoelectronics, electrostatic discharge protection, and memristors - Corresponding author: jinxl@hunnu.edu.cn
- Revised Date: 2026-05-27 Available Online: 2026-08-07
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Abstract
In the readout circuit of micro-electromechanical systems (MEMS) microphones, the high-voltage pins of charge pumps necessitate electrostatic discharge (ESD) protection designs featuring high holding voltage and high-temperature tolerance. Traditional ESD solutions cannot effectively meet the requirement. Accordingly, this paper proposes a parallel dual-BJT enhanced silicon-controlled rectifier (DBESCR) structure, which is verified in a 0.18 µm Bipolar-CMOS-DMOS (BCD) process. By incorporating a parallel dual-BJT shunt design based on the low-voltage-triggered silicon-controlled rectifier (LVTSCR), the holding voltage is effectively enhanced without a significant increase in chip area. Transmission line pulse (TLP) test results demonstrate that the DBESCR device achieves a trigger voltage of 11.8 V and a high holding voltage of 9.69 V. At an elevated temperature of 75 °C, the structure maintains a picoamperes-level leakage current, and the ESD performance of the device does not degrade noticeably. The proposed DBESCR fully meets the 9 V ESD protection design requirements for charge pumps in MEMS microphone readout circuits and exhibits ESD robustness exceeding 8 kV under the human body model (HBM). -
References
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